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Published on Sep 16, 2019

Abstract

In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme.

In addition for reader to communicate with the multiple tags, an anti-collision technique is required.

The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.

A proposed Reliable and Cost Effective Anti-collision technique (RCEAT) for Radio Frequency Identification (RFID) Class 0 UHF tag. The RCEAT architecture consists of two main subsystems; PreRCEAT and PostRCEAT.

The PreRCEAT subsystem is to detect any error in the incoming messages. Then the identification bit (ID) of the no error packet will be fed to the next subsystem. The PostRCEAT subsystem is to identify the tag by using the proposed Fast-search Lookup Table .

In this project for simulation we use Modelsim for logical verification, and further synthesizing it on Xilinx-ISE tool using target technology and performing placing & routing operation for system verification on targeted FPGA

LANGUAGE USED:

VHDL

TOOLS REQUIRED:

Simulation: modelsim5.8c

Synthesis: Xilinx 9.1





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